Technical Program
All times shown in Pacific Standard Time (UTC-8)
Links will be emailed to registrants.
Breakfast is available daily in the kitchen. Menu may vary by locale.
Sunday, February 28, 2021
Tutorials are listed separately. All tutorials are included in the conference fee, but require separate registration in order to manage capacity.
Monday, March 1, 2021
(Bold titles indicate best paper candidates)
Time | Session Title | Presentation Title | Authors |
---|---|---|---|
8:00 AM | Opening | Opening Session | |
8:15 AM | FPGA Architecture | Top-Down Physical Design of Soft Embedded FPGA Fabrics | Prashanth Mohan, Oguz Atli, Onur Kibar, Mohammed Zackriya Vanaikar, Larry Pileggi and Ken Mai |
NetCracker: A Peek into the Routing Architecture of Xilinx 7-Series FPGAs | Morten Borup Petersen, Stefan Nikolić and Mirjana Stojilović | ||
Tensor Slices to the Rescue: Supercharging ML Acceleration on FPGAs | Aman Arora | , Samidh Mehta , Vaughn Betz and Lizy John||
Global Is the New Local: FPGA Architecture at 5nm and Beyond | Stefan Nikolić | , Francky Catthoor , Zsolt Tőkei and Paolo Ienne||
FABulous: an Embedded FPGA Framework | Dirk Koch | , Nguyen Dao , Bea Healy , Jing Yu and Andrew Attwood||
Stratix 10 NX Architecture and Applications | Martin Langhammer, Eriko Nurvitadhi, Bogdan Pasca and Sergey Gribok | ||
9:30 AM | Keynote | Scientific Applications of FPGAs at the LHC | Philip Harris, MIT |
10:30 AM | Break | ||
10:45 AM | Poster Session 1 | ||
11:30 AM | Abstractions and Tools | ThunderGP: HLS-Based Graph Processing Framework on FPGAs | Xinyu Chen | , Hongshi Tan , Yao Chen , Bingsheng He , Weng-Fai Wong and Deming Chen
AutoBridge: Coupling Coarse-Grained Floorplanning and Pipelining for High-Frequency HLS Design on Multi-Die FPGAs (Best Paper Award) | Licheng Guo | , Yuze Chi , Jie Wang , Jason Lau , Weikang Qiao , Ecenur Ustun , Zhiru Zhang and Jason Cong||
AutoSA: A Polyhedral Compiler for High-Performance Systolic Arrays on FPGA | Jie Wang, Licheng Guo and Jason Cong | ||
Demystifying the Memory System of Modern Datacenter FPGAs for Software Programmers Through Microbenchmarking | Alec Lu, Zhenman Fang, Weihua Liu and Lesley Shannon | ||
HBM Connect: High-Performance HLS Interconnect for FPGA HBM | Young-kyu Choi, Yuze Chi, Weikang Qiao, Nikola Samardzic and Jason Cong | ||
PRGA: An Open-Source FPGA Research and Prototyping Framework | Ang Li and David Wentzlaff | ||
Interactive Debugging at IP Block Interfaces in FPGAs (short) | Marco Merlini, Isamu Poy and Paul Chow |
Tuesday, March 2, 2021
Time | Session Title | Presentation Title | Authors |
---|---|---|---|
8:00 AM | Machine Learning and Supporting Algorithms | GraSU: A Fast Graph Update Library for FPGA-Based Dynamic Graph Processing | Qinggang Wang, Long Zheng, Yu Huang, Pengcheng Yao, Chuangyi Gui, Xiaofei Liao, Hai Jin, Wenbin Jiang and Fubing Mao |
Folded Integer Multiplication for FPGAs | Martin Langhammer and Bogdan Pasca | ||
FracBNN: Accurate and FPGA-Efficient Binary Neural Networks with Fractional Activations | Yichi Zhang | , Junhao Pan , Xinheng Liu , Hongzheng Chen , Deming Chen and Zhiru Zhang||
DYNAMAP: Dynamic Algorithm Mapping Framework for Low Latency CNN Inference | Yuan Meng, Sanmukh Kuppannagari, Rajgopal Kannan and Viktor Prasanna | ||
S2N2: An FPGA Accelerator for Streaming Spiking Neural Networks | Alireza Khodamoradi | , Ryan Kastner and Kristof Denolf||
CoDeNet: Efficient Deployment of Input-Adaptive Object Detection on Embedded FPGAs | Qijing Huang | , Dequan Wang , Zhen Dong , Yizhao Gao , Yaohui Cai , Bichen Wu , Tian Li , Kurt Keutzer and John Wawrzynek||
Efficient FPGA Modular Multiplication Implementation (short) | Martin Langhammer and Bogdan Pasca | ||
9:25 AM | Hall of Fame Paper | ||
9:30 AM | Keynote | Are We Alone? Searching for ET with FPGAs | Dan Werthimer, University of California, Berkeley |
10:30 AM | Break | ||
10:45 AM | Poster Session 2 | ||
11:30 AM | Applications | Reconfigurable Acceleration of Short Read Mapping with Biological Consideration | Ho-Cheung Ng | , Izaak Coleman , Shuanglong Liu and Wayne Luk
An FPGA-Based 7-ENOB 600 MSample/s ADC Without Any External Components | Lukas Leuenberger | , Dorian Amiet , Tao Wei and Paul Zbinden||
A Framework for Customizable FPGA-Based Image Registration Accelerators | Davide Conficconi, Eleonora D'Arnese, Emanuele Del Sozzo, Donatella Sciuto and Marco Santambrogio | ||
NASCENT: Near-Storage Acceleration of Database Sort on SmartSSD | Sahand Salamat | , Behnam Khaleghi , Armin Haj Aboutalebi , Joo Hwan Lee , Yang Seok Ki and Tajana Rosing||
MOCHA: Multinode Cost Optimization in Heterogeneous Cloud with Accelerators (short) | Peipei Zhou, Jiayi Sheng, Cody Hao Yu, Peng Wei, Jie Wang, Di Wu and Jason Cong | ||
Design Principles for Packet Deparsers on FPGAs (short) | Thomas Luinaud, Jeferson Santiago da Silva, Pierre Langlois and Yvon Savaria | ||
12:30 PM | Closing | Best Paper and Closing |
Poster Session 1 (March 1)
Title | Authors |
---|---|
Probabilistic Optimization for High-Level Synthesis | Jianyi Cheng, John Wickerson and George Constantinides |
A Framework for Optimizing GCN Inference on FPGA | Bingyi Zhang, Rajgopal Kannan and Viktor Prasanna |
Clockwork: Resource-Efficient Static Scheduling for Multi-Rate Image Processing Applications on FPGAs | Dillon Huff | , Steve Dai and Pat Hanrahan
LEAP: A Deep Learning Based Aging-Aware Architecture Exploration Framework for FPGAs | Behnam Ghavami | , S. Milad Ebrahimipour , Zhenman Fang and Lesley Shannon
Modeling FPGA-Based Systems via Few-Shot Learning | Gagandeep Singh | , Dionysios Diamantopoulos , Juan Gómez-Luna , Sander Stuijk , Onur Mutlu and Henk Corporaal
APCNN: Explore Multi-Layer Cooperation for CNN Optimization and Acceleration on FPGA | Beilei Jiang, Xianwei Cheng, Sihai Tang, Xu Ma, Zhaochen Gu, Hui Zhao and Song Fu |
ScalaBFS: A Scalable BFS Accelerator on FPGA-HBM Platform | Chenhao Liu, Zhiyuan Shao, Kexin Li, Minkang Wu, Jiajie Chen, ruoshi li, Xiaofei Liao and Hai Jin |
AutoDSE: Enabling Software Programmers Design Efficient FPGA Accelerators | Atefeh Sohrabizadeh | , Cody Hao Yu , Min Gao and Jason Cong
SWIFT: Small-World-Based Structural Pruning to Accelerate DNN Inference on FPGA | Yufei Ma | , Gokul Krishnan , Yu Cao , Le Ye and Ru Huang
Fuzzing High-Level Synthesis Tools | Zewei Du, Yann Herklotz, Nadesh Ramanathan and John Wickerson |
RIFL: A Reliable Link Layer Network Protocol for FPGA-to-FPGA Communication | Qianfeng Shen | , Jun Zheng and Paul Chow
Poster Session 2 (March 2)
Title | Authors |
---|---|
Stealing Neural Network Structure Through Remote FPGA Side-Channel Analysis | Yicheng Zhang, Rozhin Yasaei, Hao Chen, Zhou Li and Mohammad Al Faruque |
Exploring PGAS Communication for Heterogeneous Clusters with FPGAs | Varun Sharma and Paul Chow |
Extending High-Level Synthesis for Task-Parallel Programs | Yuze Chi, Licheng Guo, Young-kyu Choi, Jie Wang and Jason Cong |
Simulating and Evaluating a Quaternary Logic FPGA Based on Floating-gate Memories and Voltage Division | Ayokunle Fadamiro, Pouyan Rezaie, Spencer Millican and Christoper Harris |
Resource Sharing in Dataflow Circuits | Lana Josipović, Axel Marmet, Andrea Guerrieri and Paolo Ienne |
Triggered Scheduling: Efficient Detection of Dataflow Network Idleness on Heterogeneous Systems | Mahyar Emami | , Endri Bezati , James Larus and Jorn Janneck
Classifying Computations on Multi-Tenant FPGAs | Mustafa Gobulukoglu | , Colin Drewes , Bill Hunter , Dustin Richmond and Ryan Kastner
NPE: An FPGA-Based Overlay Processor for Natural Language Processing | Hamza Khan | , Asma Khan , Zainab Khan , Lun Bin Huang , Kun Wang and Lei He
PyLog: An Algorithm-Centric Python-Based FPGA Programming and Synthesis Flow | Sitao Huang, Kun Wu, Paul Jeong, Chengyue Wang, Deming Chen and Wen-mei Hwu |
MLBlocks: FPGA Blocks for Machine Learning Applications | Seyedramin Rasoulinezhad, David Boland and Philip Leong |
3M-AI: A Multi-Task and Multi-Core Virtualization Framework for Multi-FPGA AI Systems in the Cloud | Shulin Zeng, Guohao Dai, Hanbo Sun, Jun Liu, Hongren Zheng, Yusong Wu, Fan Zhang, Xinhao Yang, Yi Cai, Yu Wang and Huazhong Yang |