Twenty-Fifth ACM/SIGDA International Symposium on Field-Programmable Gate Arrays
February 22-24, 2017 Monterey Marriott Hotel, Monterey, California 93940, USA
Submission Deadline Extended to September 25, 2016
The ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA 2017) is the premier conference for presentation of advances in FPGA technology. Accepted papers will be published in the conference proceedings and available in the ACM Digital Library.
We solicit research papers related to the following areas:
Research submissions may be either:
Full: at most 10 pages, for a full presentation at the conference; or Short: at most 6 pages, for a brief presentation. The presentation time allocated to each submission will be determined by the Program Committee.
Deep learning has garnered significant visibility recently as an Artificial Intelligence (AI) paradigm, with success in wide ranging applications such as image and speech recognition, natural language understanding, self-driving cars, and game playing (e.g., Alpha Go). The conference will devote a Wednesday pre-conference workshop towards the potential role of FPGAs in this important and fast-evolving domain.
We are therefore seeking submissions on topic areas such as (but not limited to): tutorial papers on deep learning highlighting future challenges and the potential role of programmable hardware in addressing them, research/design papers detailing FPGA implementations of deep learning training/inference accelerators, unique applications of reconfigurability in deep learning context, domain-specific programmable hardware architectures for deep learning, the potential uses for deep learning techniques within FPGA CAD software (e.g., for prediction and estimation).
Submissions should be at least 4 and at most 10 pages. Accepted submissions will be published in the proceedings and allocated a presentation time of up to one hour, appropriate to the content.
We also solicit proposals for the panel discussion at the conference banquet. The submission should outline the topic, questions to be addressed, and suggested speakers.
Submissions of all types should be made in the form of an English language PDF file, on-line at http://www.isfpga.org. Papers should use one of the ACM format templates posted at https://www.acm.org/publications/proceedings-template. Submissions must be received by September 18, 2016 at 11:59 PM (in any time zone).
Submissions will be considered for acceptance as full or short regular papers, workshop papers, or posters. Regular submissions related to the workshop topic may be scheduled for presentation during the workshop. Regular or workshop submissions will also be considered for acceptance as a poster. NOTE: Unlike previous years of the conference, full-length regular submissions will not be considered for acceptance as short papers.
The FPGA Symposium uses a double-blind reviewing system. Manuscripts must not identify authors or their affiliations; those that do will not be considered. Exceptions may be allowed, with prior approval of the Program Chair, in cases where the authors’ identity is vital to evaluating the paper (e.g., papers presenting updates of infrastructure used by the FPGA community). References to the authors’ prior work should be made in the 3rd person, in the same way one would reference work by others. If necessary to maintain anonymity, citations may be shown as "Removed for blind review", but consider that this may impede a thorough review if the removed citation is crucial to understanding the submission.
Submissions due: September 18, 2016
Notification of acceptance: Mid-November, 2016
Camera-ready copy of accepted papers due: Early December, 2016
For questions about the submission process or technical program:
Jason Anderson, Program Chair FPGA 2017
Dept. of Electrical and Computer Engineering, University of Toronto
10 King's College Road
Toronto, ON M5S 3G4 CANADA
For general questions about the conference:
Jonathan Greene, General Chair FPGA 2017
3850 North First Street
San Jose, CA 95134 USA